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PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840004-11
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
FEATURES
* Four LVCMOS/LVTTL outputs, 15 typical output impedance * Crystal oscillator interface * Input frequency range: 22.4MHz to 28MHz * Output frequency Range: 56MHz - 140MHz * VCO Range: 560MHz - 700MHz * RMS phase jitter at 125MHz (1.875MHz - 20MHz): 0.70ps (typical) * RMS phase noise at 125MHz: * Full 3.3V supply * 0C to 70C ambient operating temperature * Available in both standard and lead-free RoHS-compliant packages
GENERAL DESCRIPTION
The ICS840004-11 is a 4 output LVCMOS/ LVTTL Synthesizer optimized to generate HiPerClockSTM Ethernet reference clock frequencies and is a member of the HiPerClocks TM family of high performance clock solutions from ICS. Using a 25MHz, 18pF parallel resonant crystal, 125MHz and 62.5MHz can be generated based on one frequency select pin (F_SEL). The ICS840004-11 uses ICS' 3rd generation low phase noise VCO technology and can achieve 1ps or lower typical random rms phase jitter, easily meeting Ethernet jitter requirements. The ICS840004-11 is packaged in a small 20-pin TSSOP package.
IC S
FREQUENCY SELECT FUNCTION TABLE
Inputs M Divider N Divider Value Value 25 10 25 5
FOR
ETHERNET FREQUENCIES
Output Frequency (25MHz Ref.) 62.5 125
F_SEL 0 1
M/N Ratio Value 2.5 5
BLOCK DIAGRAM
OE Pullup F_SEL Pullup
PIN ASSIGNMENT
F_SEL nc nc nc OE nc nc VDDA nc VDD 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 nc GND Q0 Q1 VDDO Q2 Q3 GND XTAL_IN XTAL_OUT
25MHz XTAL_IN
F_SEL
Q0
OSC
XTAL_OUT
Phase Detector
VCO
N 0 /10 1 /5
Q1
Q2
ICS840004-11
20-Lead TSSOP
6.5mm x 4.4mm x 0.92mm package body
M = /25 (fixed)
Q3
G Package Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
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PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840004-11
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
Type Input Pullup Description Frequency select pin. LVCMOS/LVTTL interface levels. No connect. Pullup Output enable pin. When HIGH, the outputs are active. When LOW, the outputs are in a high impedance state. LVCMOS/LVTTL interface levels. Analog supply pin. Core supply pin. Cr ystal oscillator interface. XTAL_OUT is the output. XTAL_IN is the input. Power supply ground. Single-ended clock outputs. LVCMOS/LVTTL interface levels. 15 typical output impedence. Output supply pin.
TABLE 1. PIN DESCRIPTIONS
Number 1 2, 3, 4, 6, 7, 9, 20 5 8 10 11, 12 13, 19 14, 15 17, 18 16 Name F_SEL nc OE VDDA VDD XTAL_OUT, XTAL_IN GND Q3, Q2, Q1, Q0 VDDO
Unused Input Power Power Input Power Output Power
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol CIN CPD RPULLUP ROUT Parameter Input Capacitance Power Dissipation Capacitance Input Pullup Resistor Output Impedance VDD, VDDA, VDDO = 3.465V Test Conditions Minimum Typical 4 TBD 51 15 Maximum Units pF pF k
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REV. A OCTOBER 3, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840004-11
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
4.6V -0.5V to VDD + 0.5 V -0.5V to VDDO + 0.5V 73.2C/W (0 lfpm) -65C to 150C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD Inputs, VI Outputs, VO Package Thermal Impedance, JA Storage Temperature, TSTG
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDDD = VDDA = VDDO = 3.3V5%, TA = 0C TO 70C
Symbol VDD VDDA VDDO IDD IDDA IDDO Parameter Core Supply Voltage Analog Supply Voltage Output Supply Voltage Power Supply Current Analog Supply Current Output Supply Current Test Conditions Minimum 3.135 3.135 3.135 Typical 3.3 3.3 3.3 90 8 5 Maximum 3.465 3.465 3.465 Units V V V mA mA mA
TABLE 3B. LVCMOS/LVTTL DC CHARACTERISTICS, VDDD = VDDA = VDDO = 3.3V5%, TA = 0C TO 70C
Symbol Parameter VIH VIL IIH IIL VOH VOL Input High Voltage Input Low Voltage Input High Current Input Low Current OE, F_SEL OE, F_SEL VDD = VIN = 3.465V VDD = 3.465V, VIN = 0V VDDO = 3.3V 5% VDDO = 3.3V 5% -150 2.6 0. 5 Test Conditions Minimum Typical 2 -0.3 Maximum VDD + 0.3 0.8 5 Units V V A A V V
Output High Voltage; NOTE 1 Output Low Voltage; NOTE 1
NOTE 1: Outputs terminated with 50 to VDDO/2. See Parameter Measurement Information, 3.3V Output Load Test Circuit.
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter Mode of Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Drive Level NOTE: Characterized using an 18pF parallel resonant cr ystal. Test Conditions Minimum Typical 25 50 7 1 Maximum Units MHz pF mW Fundamental
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REV. A OCTOBER 3, 2005
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PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840004-11
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
Test Conditions Minimum 56 25 125MHz @ Integration Range: 1.875MHz - 20MHz 62.5MHz @ Integration Range: 1.875MHz - 20MHz 20% to 80% 0.70 0.54 470 Typical Maximum 140 Units MHz ps ps ps ps %
TABLE 5A. AC CHARACTERISTICS, VDD = VDDA = VDDO = 3.3V5%, TA = 0C TO 70C
Symbol fOUT tsk(o) tjit(O) tR / tF Parameter Output Frequency Range Output Skew; NOTE 1, 2 RMS Phase Jitter (Random); NOTE 3 Output Rise/Fall Time
odc Output Duty Cycle 50 NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions. Measured at VDDO/2. NOTE 2: This parameter is defined in accordance with JEDEC Standard 65. NOTE 3: Please refer to the Phase Noise Plot.
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REV. A OCTOBER 3, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840004-11
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
TYPICAL PHASE NOISE
AT
0 -10 -20 -30 -40 -50
62.5MHZ @3.3V
1Gb Ethernet Filter 62.5MHz
RMS Phase Jitter (Random) 1.875MHz to 20MHz = 0.54ps
NOISE POWER dBc Hz
-60 -70 -80 -90 -100 -110
Raw Phase Noise Data
-120 -130 -140 -150
100 1k 10k 100k
-160 -170 -180 -190
Phase Noise Result by adding 1Gb Ethernet Filter to raw data
1M 10M 100M
OFFSET FREQUENCY (HZ)
0 -10 -20 -30 -40 -50
TYPICAL PHASE NOISE
AT
125MHZ @2.5V
1Gb Ethernet Filter 125MHz
RMS Phase Jitter (Random) 1.875MHz to 20MHz = 0.70ps
NOISE POWER dBc Hz
-60 -70 -80 -90 -100 -110
Raw Phase Noise Data
-120 -130 -140 -150 -170 -180 -190 100
840004AG-11
Phase Noise Result by adding 1Gb Ethernet Filter to raw data
1k 10k 100k
-160
OFFSET FREQUENCY (HZ)
5
1M
10M
100M
REV. A OCTOBER 3, 2005
www.icst.com/products/hiperclocks.html
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840004-11
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
PARAMETER MEASUREMENT INFORMATION
1.65V5%
VDD, VDDA, VDDO
SCOPE
Qx
V
DDO
2
LVCMOS
GND
Qx
V
Qy
DDO
2 tsk(o)
-1.65V5%
3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT
OUTPUT SKEW
Phase Noise Plot
V
DDO
Noise Power
Q0:Q3 t PW
t
2
Phase Noise Mask
PERIOD
odc =
f1 Offset Frequency f2
t PW t PERIOD
x 100%
RMS Jitter = Area Under the Masked Phase Noise Plot
RMS PHASE JITTER
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
80% 20% tR
80% 20% tF
Clock Outputs
OUTPUT RISE/FALL TIME
840004AG-11
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REV. A OCTOBER 3, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840004-11
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS840004-11 provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. VDD, VDDA, and VDDO should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10 resistor along with a 10F and a .01F bypass capacitor should be connected to each VDDA.
3.3V VDD .01F VDDA .01F 10F 10
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS840004-11 has been characterized with 18pF parallel resonant crystals. The capacitor values shown in Figure 2 below were determined using a 25MHz 18pF parallel resonant crystal and were chosen to minimize the ppm error.
XTAL_IN C1 22p X1 18pF Parallel Cry stal XTAL_OUT C2 22p ICS84332
Figure 2. CRYSTAL INPUt INTERFACE
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS INPUTS: OUTPUTS:
CRYSTAL INPUT: For applications not requiring the use of the crystal oscillator input, both XTAL_IN and XTAL_OUT can be left floating. Though not required, but for additional protection, a 1k resistor can be tied from XTAL_IN to ground. LVCMOS CONTROL PINS: All control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. A 1k resistor can be used.
840004AG-11 www.icst.com/products/hiperclocks.html REV. A OCTOBER 3, 2005
LVCMOS OUTPUT: All unused LVCMOS output can be left floating. We recommend that there is no trace attached.
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PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840004-11
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER RELIABILITY INFORMATION
TABLE 6. JAVS. AIR FLOW TABLE
FOR
20 LEAD TSSOP
JA by Velocity (Linear Feet per Minute)
0
Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards 114.5C/W 73.2C/W
200
98.0C/W 66.6C/W
500
88.0C/W 63.5C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for ICS840004-11 is: 1795
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REV. A OCTOBER 3, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840004-11
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
FOR
PACKAGE OUTLINE - G SUFFIX
20 LEAD TSSOP
TABLE 7. PACKAGE DIMENSIONS
SYMBOL MIN N A A1 A2 b c D E E1 e L aaa 0.45 0 -4.30 0.65 BASIC 0.75 8 0.10 -0.05 0.80 0.19 0.09 6.40 6.40 BASIC 4.50 20 1.20 0.15 1.05 0.30 0.20 6.60 Millimeters MAX
Reference Document: JEDEC Publication 95, MO-153
840004AG-11 www.icst.com/products/hiperclocks.html REV. A OCTOBER 3, 2005
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PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840004-11
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 8. ORDERING INFORMATION
Part/Order Number ICS840004AG-11 ICS840004AG-11T ICS840004AG-11LF ICS840004AG-11LFT Marking ICS840004A11 ICS840004A11 ICS40004A11L ICS40004A11L Package 20 Lead TSSOP 20 Lead TSSOP 20 Lead "Lead-Free" TSSOP 20 Lead "Lead-Free" TSSOP Shipping Packaging tube 2500 tape & reel tube 2500 tape & reel Temperature 0C to 70C 0C to 70C 0C to 70C 0C to 70C
NOTE: Par ts that are ordered with an "LF" suffix to the par t number are the Pb-Free configuration and are RoHS compliant.
The aforementioned trademarks, HiPerClockS and FEMTOCLOCKS are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 840004AG-11
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REV. A OCTOBER 3, 2005

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